information furnished by analog devices is be lieved to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or oth- erwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective companies. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. t el: 781/329-4700 www.analog.com fa x: 781/326-8703 ? 2003 analog devices, inc. all rights reserved. ADG3231 * low voltage, single-channel level translator * pa tent pending features operates from 1.65 v to 3.6 v supply rails unidirectional signal path, bidirectional level translation tiny 6-lead sot-23 package short circuit protection lv t tl/cmos compatible inputs applications level translation low voltage asic translation serial interface translation functional block diagram a1 gnd y1 v cc2 v cc1 general description the ADG3231 is a level translator designed on a submicron process that operates from supplies as low as 1.65 v. the device is guaranteed for operation over the supply range 1.65 v to 3.6 v. it operates from two supply voltages, allowing bidirectional level translation, i.e., it translates low voltages to higher voltages and vice versa. the signal path is unidirectional, meaning data may ow only from a1 to y1. this type of device may be used in applications requiring commu- nication between devices operating from different supply levels. the level translator is packaged in one of the smallest footprints av ailable for its pin count. the 6-lead sot-23 package requires only a maximum of 5.28 mm 5.28 mm board space. product highlights 1. bidirectional level translation matches any voltage level from 1.65 v to 3.6 v. 2. the device offers high performance and is fully guaranteed across the supply range. 3. short circuit protection. 4. tiny sot-23 package. rev. 0
?2? ADG3231?specifications 1 (v cc1 = v cc2 = 1.65 v to 3.6 v, gnd = 0 v. all speci? cations t min to t max , un less oth er wise noted.) parameter symbol conditions min typ 2 max unit logic inputs/outputs 3 input high voltage 4 v ih v cc1 = 3.0 v to 3.6 v 1.35 v v ih v cc1 = 2.3 v to 2.7 v 1.35 v v ih v cc1 = 1.65 v to 1.95 v 0.65 v cc v input low voltage 4 v il v cc1 = 3.0 v to 3.6 v 0.8 v v il v cc1 = 2.3 v to 2.7 v 0.7 v v il v cc1 = 1.65 v to 1.95 v 0.35 v cc v output high voltage v oh i oh = ?100 a, v cc2 = 3.0 v to 3.6 v 2.4 v v cc2 = 2.3 v to 2.7 v 2.0 v v cc2 = 1.65 v to 1.95 v v cc ? 0.45 v i oh = ?4 ma, v cc2 = 2.3 v to 2.7 v 2.0 v v cc2 = 1.65 v to 1.95 v v cc ? 0.45 v i oh = ?8 ma, v cc2 = 3.0 v to 3.6 v 2.4 v output low voltage v ol i oh = +100 a, v cc2 = 3.0 v to 3.6 v 0.4 v v cc2 = 2.3 v to 2.7 v 0.4 v v cc2 = 1.65 v to 1.95 v 0.45 v i oh = +4 ma, v cc2 = 2.3 v to 2.7 v 0.4 v v cc2 = 1.65 v to 1.95 v 0.45 v i oh = +8 ma, v cc2 = 3.0 v to 3.6 v 0.4 v switching characteristics 4, 5 propagation delay, t pd a1 to y1 t phl , t plh 3.3 v 0.3 v, c l = 30 pf, v t = v cc /2 4 6.5 ns propagation delay, t pd a1 to y1 t phl , t plh 2.5 v 0.2 v, c l = 30 pf, v t = v cc /2 4.5 6.5 ns propagation delay, t pd a1 to y1 t phl , t plh 1.8 v 0.15 v, c l = 30 pf, v t = v cc /2 6.5 10.25 ns input leakage current i i 0 v in 3.6 v 1 a output leakage current i o 0 v in 3.6 v 1 a power requirements power supply voltages v cc1 1.65 3.6 v v cc2 1.65 3.6 v quiescent power supply current i cc1 digital inputs = 0 v or v cc 2 a i cc2 digital inputs = 0 v or v cc 2 a notes 1 temperature range is as follows: b version: ?40c to +85c. 2 all typical values are at v cc1 = v cc2 , t a = 25c, unless otherwise stated. 3 v il and v ih levels are speci? ed with respect to v cc1 ; v oh and v ol levels are with respect to v cc2 . 4 guaranteed by design, not subject to production test. 5 see test circuit and waveforms. speci? cations subject to change without notice. rev. 0
ADG3231 ?3? caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily ac cu mu late on the human body and test equipment and can discharge without detection. although the ADG3231 features proprietary esd pro tec tion circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd pre cau tions are rec om mend ed to avoid per for mance deg ra da tion or loss of functionality. absolute maximum ratings * (t a = 25?c, unless otherwise noted.) v cc to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . e0.3 v to +4.6 v a1 input voltage . . . . . . . . . . . . . . . . . . . e0.3 v to v cc1 +0.3 v dc output current . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 ma operating temperature range industrial (b version) . . . . . . . . . . . . . . . . . . e40?c to +85?c storage temperature range . . . . . . . . . . . . . e65?c to +150?c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .150?c 6-lead sot-23, q ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 229?c/w lead temperature, soldering (10 seconds) . . . . . . . . . . . 300?c ir re? ow , p eak temperature (<20 seconds) . . . . . . . . . . 235?c * stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specitcation is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. pin configuration adg 3231 (not to scal e) v a1 1 2 3 5 6 4 v y1 gnd nc cc1 cc2 ordering guide model temperature range package description branding package option ADG3231brj-reel e40?c to +85?c sot-23 w2b rj-6 ADG3231brj-reel7 e40?c to +85?c sot-23 w2b rj-6 pin function descriptions pin mnemonic description 1 v cc1 supply voltage 1, can be any supply voltage from 1.65 v to 3.6 v. 2 nc not internally connected. 3 a1 digital input referred to v cc1 . 4 gnd device ground pin. 5 y1 digital output referred to v cc2 . 6 v cc2 supply voltage 2, can be any supply voltage from 1.65 v to 3.6 v. rev. 0
?4? ADG3231?typical performance characteristics v cc1 ? v i cc1 ? na 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 1.5 2.0 3.0 2.5 3.5 4.0 v cc2 = 3.3v t a = 25 c v cc2 = 2.5v v cc2 = 1.8v tpc 1. i cc1 vs. v cc1 temperature ? c i cc2 ? na 30 ?5 5 0 10 15 20 25 080 70 60 50 40 30 20 10 v cc1 = 3.3v t a = 25 c v cc2 = 2.5v v cc2 = 3.3v v cc2 = 1.8v tpc 4. i cc2 vs. temperature supply ? v time ? ns 4 6 8 10 0 2 1.5 2.0 3.0 2.5 3.5 4.0 t en t dis t a = 25 c v cc1 = v cc2 tpc 7. enable, disable time vs. supply v cc2 ? v i cc2 ? na 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 1.5 2.0 3.0 2.5 3.5 4.0 t a = 25 c v cc1 = 2.5v v cc1 = 3.3v v cc1 = 1.8v tpc 2. i cc2 vs. v cc2 frequency ? hz i cc1 ? a 0 10k 100k 1m 10 20 30 40 50 60 70 80 10m 100m t a = 25 c v cc1 = v cc2 = 1.8v v cc1 = v cc2 = 3.3v tpc 5. i cc1 vs. frequency temperature ? c time ? ns 3 4 5 6 0 2 1 ?40 ?20 20 04080 60 t en t dis v cc1 = v cc2 = 3.3v tpc 8. enable, disable t ime vs. temperature temperature ? c i cc1 ? na 30 0 5 10 15 20 25 080 70 60 50 40 30 20 10 v cc1 = 2.5v v cc1 = 3.3v v cc1 = 1.8v v cc2 = 3.3v t a = 25 c tpc 3. i cc1 vs. temperature frequency ? hz i cc2 ? a 0 10k 100k 1m 200 400 600 800 1000 1200 1400 1600 1800 2000 10m 100m t a = 25 c v cc1 = v cc2 = 3.3v v cc1 = v cc2 = 1.8v tpc 6. i cc2 vs. frequency capacitive load ? pf rise/fall time ? ns 16 2 4 6 8 10 12 14 0 22 102 92 82 72 62 52 42 32 t plh , low-to-high transition t phl , high-to-low transition v cc1 = 3.3v v cc2 = 1.8v t a = 25 c data rate 10mbps tpc 9. rise/fall time vs. capacitive load, a1?y1 rev. 0
ADG3231 ?5? capacitive load ? pf rise/fall time ? ns 10 1 2 3 4 5 6 7 8 9 0 22 102 92 82 72 62 52 42 32 t hl , high-to-low transition v cc1 = 1.8v v cc2 = 3.3v t a = 25 c data rate 10mbps t lh , low-to-high transition tpc 10. rise/fall time vs. capacitive load, a1?y1 temperature ? c propagation delay ? ns 3.0 4.0 0 1.0 2.0 80 60 40 20 0 ?20 ?40 t a = 25 c v cc1 = v cc2 = 3.3v t phl , a1?y2 t plh , a1?y2 tpc 13 propagation delay vs. temperature current ? ma voltage ? v 3.5 0.5 1 1.5 2 2.5 3 0 020 15 10 5 sink t a = 25 c v cc = v cc1 = v cc2 v cc = 3.3v v cc = 2.5v v cc = 1.8v v cc = 1.8v v cc = 2.5v v cc = 3.3v source tpc 16. y1 sink and source current capacitive load ? pf propagation delay ? ns 8 1 2 3 4 5 6 7 22 102 92 82 72 62 52 42 32 0 t phl , high-to-low transition t plh , low-to-high transition v cc1 = 3.3v v cc2 = 3.3v t a = 25 c data rate 10mbps tpc 11. propagation delay vs. capacitive load, a1?y1 3 t a = 25 c data rate = 10mhz y1 1.8v 3.3v a1 2 tpc 14. input/output v cc1 = 3.3 v, v cc2 = 1.8 v supply ? v propagation delay ? ns 6.0 8.0 0 2.0 4.0 1.5 2.0 3.0 2.5 3.5 4.0 t a = 25 c v cc1 = v cc2 t plh , a1?y2 t phl , a1?y2 tpc 12. propagation delay vs. supply, bypass mode 2 3 t a = 25 c data rate = 10mhz y2 1.8v 3.3v a1 1 tpc 15. input/output v cc1 = 1.8 v, v cc2 = 3.3 v rev. 0
ADG3231 ?6? test circuit inpu t 0v v oh v ol v cc1 v t v l t plh t phl output figure 1. propagation delay description the ADG3231 is a level translating device designed on a submicron process that operates from supplies as low as 1.65 v. the device is guaranteed for operation over the supply range 1.65 v to 3.6 v. it operates from two supply voltages, allowing bidirectional level translation, i.e., it translates low voltages to high voltages and vice ve r sa. the signal path is unidirectional, meaning data may only ? ow from a to z. a1 input the a1 input is capable of accepting inputs outside the v cc1 supply range. for example, the v cc1 supply applied to the device could be 1.8 v while the preceding device could be supplied from a 2.5 v or 3.3 v supply rail. there are no internal diodes to the supply rails, so the ADG3231 can handle inputs above the supply but inside the absolute maximum ratings stated. normal operation the signal path is from a1 to y1. the device will level translate the signal applied to a1 to a v cc1 logic level (this level translation can be to either a higher or a lower supply) and route the signal to the y1 output, which will have standard v ol /v oh levels for v cc2 supplies. the supplies in figure 2 may be any combination of supplies, e.g., v cc1 and v cc2 may be anywhere in the range of 1.65 v to 3.6 v. signal output v cc2 device 2 signal input device 1 ADG3231 a1 gnd y1 v cc2 v cc1 v cc1 figure 2. typical operation of the ADG3231 level translating switch rev. 0
ADG3231 ?7? outline dimensions 6-lead small outline transistor package [sot-23] (rj-6) dimensions shown in millimeters 1 3 4 5 2 6 2.90 bsc pin 1 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 0.22 0.08 10 4 0 0.50 0.30 0.15 max 1.30 1.15 0.90 seating plane 1.45 max 0.60 0.45 0.30 compliant to jedec standards mo-178ab rev. 0
c03298?0?5/03(0) ?8?
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